DDR5

SMART's DDR5 memory modules are designed to meet increasing needs for efficient performance in a wide range of applications including cloud computing, and data center processing. DDR5 improves scaling performance without degrading channel efficiency at higher speeds. This increased performance is achieved by doubling the burst length to BL16 and bank-count to 32 from 16. A DDR5 DIMM boasts two 40-bit fully independent sub-channels on the same module.

Longer Burst Length

For DDR4, the burst length is eight. For DDR5, burst length will be extended to sixteen to increase burst payload. Burst length of sixteen (BL16), allows a single burst to access 64 Bytes of data, which is the typical CPU cache line size. This provides a significant improvement in concurrency and with two channels, greater memory efficiency. DDR5 supports features like on-die ECC.

New Power Architecture for DDR5

A major change is the power architecture. With DDR5 DIMMs, power management moves from the motherboard to the DIMM directly. DDR5 DIMMs will have a 12-V integrated voltage regulator on DIMM. The regulator distributes the 1.1 V VDD supply, helping with better signal integrity and reduction of noise.

Channel Architecture: One DIMM Two Channels

DDR4 DIMMs have a 72-bit bus, comprised of 64 data bits plus eight ECC bits. With DDR5, each DIMM will have two channels. Each of these channels will be 40-bits wide: 32 data bits with eight ECC bits. While the data width is the same (64-bits total), having two smaller independent channels improves memory access efficiency. In the DDR5 DIMM architecture, the left and right side of the DIMM, each served by an independent 40-bit wide channel, share the RCD. Giving each lane an independent clock improves signal integrity and lowers the noise margin.

DDR4 and DDR5 Comparison

Here is the top six most significant specification advances made in the transition from DDR4 to DDR5.

● Command/Address and Control Bus is Double Data Rate

● Generates CRC Checksum in READ Data Frames

● Default Burst Length Increased to BL16 – Single Burst = 64B of Data

● Integrated Temperature Sensor (MR4)

● DDR5 DRAM Contains 256 Mode Registers