Advanced Error Detection & Correction
SMART’s Advanced Error Detection & Correction technology reinforces the ECC (Error Code Correction) engine and utilizes RAID (Redundant Array of Independent Disks) mechanism. Data is reconstructed by the prior stored parity in other pages. The recovered data will be stored in a new block, and the prior stored block will be refreshed.
TCG Opal 2.0
Trusted Computing Group (TCG) Storage Work Group created the Opal Security Subsystem Class (SSC) as one class of security management protocol for storage devices. It is the most recognized standard for self-encrypting drives (SEDs). SMART offers TCG Opal 2.0 compliant self-encrypting SSDs incorporating AES encryption for rock-solid data protection.
FIPS 140-2 Level 2
All U.S. government systems require FIPS 140-2 validation since this standard sets a high security benchmark. Since SMART has been cooperating with the U.S. government, organizations and private enterprises that manage sensitive or confidential data, it has developed FIPS inside SED (self-encrypting drive) products that contain cryptographic component(s) that has been validated to NIST FIPS 140-2 Level-2 standard criteria.
Exposure to sulfur dioxide causes a corrosive reaction when silver alloys encounter sulfur gasses or liquid. This typically decreases resistor conductivity and thus increases failure risks. SMART uses ASRs (Anti-Sulfur Resistors) when needed for SMART-built products, allowing them to operate reliably in harsh sulfur-rich environments to meet the highest industrial standards.
As industrial devices have to survive exposure to harsh environments, conformal coating improves product ruggedness when applied on the module surface area. It enhances product reliability and safeguards against damage from dust, high humidity, salt water air, solvents, chemicals and other harsh materials.
SMART’s patented retention clips highly improve reliability resistant to vibration, shock and sudden movements. As industrial and ruggedized customer equipment is exposed to severe vibration situations, module retention clips can be mechanically secured to the sides of memory socket to prevent the latches from popping open.
Thermal throttling is a safety feature if a drive gets too hot. Thermal sensors monitor the operating temperature of critical components. Firmware thermal throttling algorithm is activated when necessary to prevent the temperature from exceeding maximum thresholds by reducing the performance of I/O transactions until the operating temperature declines to a safe level.
Pseudo Single-Level Cell (pSLC) is the new technology of using Multi-Level cell (MLC) or Triple-Level cell (TLC) NAND Flash in a way that reduces the number of bits stored in each cell to one. Reducing the amount of stored bits in each cell to one increases the reliability and lifetime of the NAND Flash memory.
Wear-Leveling refers to the practice of ensuring certain NAND blocks aren’t written and erased more often than others. By preventing the overuse of particular blocks which could lead to device failure or data loss, Wear-Leveling therefore improves the life expectancy and endurance of Flash products.
Flash-based storage devices are different in the way they deal with previously deleted data compared to traditional disks. Data must be erased first before new data can be written to the same block in SSDs. Garbage Collection copies in-use data to a new block, and then deletes all data from the old one.
SMART Memory Test Labs (SMTL)
SMART's SMTL ensures that its products are compatible with Intel®-based and AMD®-based servers from concept to production. SMART has a broad range of comprehensive system test process, an Engineering Failure Response Team (EFRT) for failure analysis, and an extensive design support for customers.
High Performance Computing platforms, such as those in Hyperscale Data Centers, demand the utmost in reliability to maintain five-9s Quality of Service. SMART's Zefr processing takes memory reliability to the extreme. Standard memory module processing allows about 3,000 defective parts per million (DPPM) to ship and to be placed in service – modules that will ultimately fail. Zefr processing eliminates over 90% of memory reliability failures by putting modules through intense stress testing in real-world environmental conditions that lowers failures to under 200 DPPM. Zefr is the new standard for HPC memory. Designed to support demanding applications where failure is not an option, Zefr memory modules increase ROI, maximize HPC System Yield Rate, and accelerate “Time-to-Insight” – all while shortening platform bring up time and reducing maintenance costs.