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tmccorm2011
Flash memory devices are not inherently safeguarded against power faults. Refer ...
memorywrangler
There was a paper about similar problems at DAC last year. They showed that ...
Validating embedded flash memory products to endure power faults
Thomas McCormick
11/25/2011 1:24 PM EST
Validating embedded flash memory products for power fault resilience
establishes their ability to reliably endure the power faults that
embedded system designs inevitably encounter during their normal
operation. Fortunately, there are systems available that specifically
demonstrate power fault resilience of embedded flash memory products.
Embedded systems impose requirements on flash memory products that consumer-grade flash products do not. One significant example is the ability to reliably endure power faults during any mode of operation. While not a desirable operating condition, the flash memory products supporting embedded systems must be specifically designed and validated to endure power faults without any loss or corruption of saved data. This is especially true for critical data such as the system's firmware.
As a result, embedded flash memory products should be holistically designed for optimal resilience to power faults. Specifically, both the hardware and firmware used in these products must be designed in concert to support power faults. For example, voltage detection circuits have to ensure that the flash product's controller halts internal flash write operations when power faults occur, and its firmware must be designed to recover flash from any state of interruption.
Flash memory designs also need to demonstrate their ability to endure power faults under all operating modes to be considered validated and acceptable for use in embedded systems. A system that is specifically designed for this validation is shown in Figure 1.
Figure 1 – System for Power Fault Cycling and Resilience Validation
In this method, a host computer is used to validate an embedded flash memory design. The host computer system supports a bus that is compatible with a flash device for read/write transfers. A specially designed software application continually writes and validates (reads) data to and from the flash product. This software application also controls power to the flash product. At randomly timed intervals, power is abruptly removed from the product. After the flash device power is fully discharged, the application reconnects power and reestablishes communications with the flash product. Once communications are reestablished, the software application validates the data on the product. (This includes checking the data that was written during previous cycles as well as checking a read-only area that represents firmware storage.) An example system for validation of eUSB products is shown in Figure 2.
Figure 2 – Example Power Fault Cycling and Resilience System (eUSB)
Because of the asynchronous nature of the induced power faults, all flash memory modes of operation are eventually subjected to power faults with sufficient cycles using this method. Operations with a wide array of flash device designs have demonstrated that write operations are by far the most susceptible to data loss and corruptions in inadequately designed flash memory devices. Some consumer-grade flash memory devices have been observed to fail with corrupted data in only a few cycles. In contrast, flash products designed for embedded applications may operate successfully for many hundreds of cycles; this is far more than they would be expected to endure in a fielded application.
Embedded systems place demands on flash memory devices that may exceed those provided by consumer-grade flash memory products. Only with a specific designed validation system can an embedded flash memory device be demonstrated to meet these demands.
About the Author
Thomas McCormick has eighteen years experience designing PC and embedded computer systems. Twelve of these years have focused on flash memory product research and development at SMART Modular Technologies. Tom is also currently pursuing his PhD in Computer Engineering at Northeastern University. His research is focused on flash memory and next generation non-volatile memory systems for ultra-reliable code storage in embedded applications.
Embedded systems impose requirements on flash memory products that consumer-grade flash products do not. One significant example is the ability to reliably endure power faults during any mode of operation. While not a desirable operating condition, the flash memory products supporting embedded systems must be specifically designed and validated to endure power faults without any loss or corruption of saved data. This is especially true for critical data such as the system's firmware.
As a result, embedded flash memory products should be holistically designed for optimal resilience to power faults. Specifically, both the hardware and firmware used in these products must be designed in concert to support power faults. For example, voltage detection circuits have to ensure that the flash product's controller halts internal flash write operations when power faults occur, and its firmware must be designed to recover flash from any state of interruption.
Flash memory designs also need to demonstrate their ability to endure power faults under all operating modes to be considered validated and acceptable for use in embedded systems. A system that is specifically designed for this validation is shown in Figure 1.
Figure 1 – System for Power Fault Cycling and Resilience Validation
In this method, a host computer is used to validate an embedded flash memory design. The host computer system supports a bus that is compatible with a flash device for read/write transfers. A specially designed software application continually writes and validates (reads) data to and from the flash product. This software application also controls power to the flash product. At randomly timed intervals, power is abruptly removed from the product. After the flash device power is fully discharged, the application reconnects power and reestablishes communications with the flash product. Once communications are reestablished, the software application validates the data on the product. (This includes checking the data that was written during previous cycles as well as checking a read-only area that represents firmware storage.) An example system for validation of eUSB products is shown in Figure 2.
Figure 2 – Example Power Fault Cycling and Resilience System (eUSB)
Because of the asynchronous nature of the induced power faults, all flash memory modes of operation are eventually subjected to power faults with sufficient cycles using this method. Operations with a wide array of flash device designs have demonstrated that write operations are by far the most susceptible to data loss and corruptions in inadequately designed flash memory devices. Some consumer-grade flash memory devices have been observed to fail with corrupted data in only a few cycles. In contrast, flash products designed for embedded applications may operate successfully for many hundreds of cycles; this is far more than they would be expected to endure in a fielded application.
Embedded systems place demands on flash memory devices that may exceed those provided by consumer-grade flash memory products. Only with a specific designed validation system can an embedded flash memory device be demonstrated to meet these demands.
About the Author
Thomas McCormick has eighteen years experience designing PC and embedded computer systems. Twelve of these years have focused on flash memory product research and development at SMART Modular Technologies. Tom is also currently pursuing his PhD in Computer Engineering at Northeastern University. His research is focused on flash memory and next generation non-volatile memory systems for ultra-reliable code storage in embedded applications.
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Sanjib.Acharya
11/25/2011 9:43 PM EST
Are the FLASH devices inherently safeguarded against the power interruption? Or is it only the external protection using the capacitors to hold the voltage for sufficient time, which could protect the FLASH devices against random loss of power?
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tmccorm2011
11/29/2011 10:25 AM EST
Flash memory devices are not inherently safeguarded against power faults. Refer to the UCSD paper referenced by memorywrangler below to see just how significant the issue can be. Energy storage to permit graceful flash operating halting is indeed one approach to address the issue, but the protection needs to be designed into the flash memory products at the system level to ensure full protection.
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agk
11/26/2011 3:57 AM EST
The standard IEEE1005 discusses about the disturbance conditions and the relibility issues. Also the more common features incorporated into the arrays and methods for testing these complex products efficiently are addressed. The ATE's are growing and also their cost.
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memorywrangler
11/26/2011 3:03 PM EST
There was a paper about similar problems at DAC last year. They showed that flash can exhibit some very strange behavior when power fails, and it looks like the rig described here might not catch some of them. In particular, the paper showed that power interruption can corrupt data already written to a flash chip and that interruptions can cause reductions in data retention time for data being programmed when power failed. As a result, any attempt to measure reliability also needs to look for latent errors as well as those that are immediately visible.
The paper is available online here: http://nvsl.ucsd.edu/ftest/
It's entitled "Understanding the Impact of Power Loss on Flash Memory"
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